The Next Big Innovation in Microprocessors: Anant Agarwal (Part 5)

Here we delve into a discussion of the differences between multiprocessor and multicore architectures. Multicore is when you put multiple processors on a single chip. But you still need to overcome bus bottlenecks.

SM: So multicore does not use the traditional packaging? AA: Not really. In multiprocessors, for example, at Alewife we built a machine with 32 processors, but each one was on a separate board and the machine took up an entire rack. That is the multiprocessor setup. The multicore system we just built has 64 cores in it, so it is like a multiprocessor configuration just on a single chip – that is multicore.

SM: Let’s talk about the different dimensions of the multicore architecture. Where are you gaining the performance and how? AA: There are three big challenges with a multicore design; performance, power efficiency, and programmability. I call them the three P’s. For multicore processors to take off, we had to start with a clean slate. There was nowhere to incrementally improve existing designs. It was a huge upheaval; we had to rethink the architecture, software, and processor design. We have done this with an approach that builds upon existing standards while allowing you to harness multicore performance.

SM: So let’s talk about the 3Ps and the gains from addressing each. AA: We talk about five big innovations. The first big one is the interconnect design. That is the really big one. Once the sequential processors ran out of steam, industry went to multicore designs and are now aggressively pursuing that technology. It is hard to find single core processors now. Multicore has arrived. The challenge in mulitcore is that even though you put down multiple processors on a chip, you are still held down to the bus. The bus remains a single central switch and all packets that flow from core to core need to go through it. The bus is the bottleneck.

We have an analogy which is to imagine an intersection where only one car could go through at a time. You cannot build a big city around that intersection. Optimizing bus architecture is important. It is very similar to how Ethernet went. In the early 80’s it was a single wire, but in the early 90’s we moved into switches and routers to expand the capability of Ethernet.

The same deal with multiprocessors. You put them on a bus, have them use a mesh connector like the one we developed at Alewife. Conventional architectures use buses, and we knew that the conventional architecture would not scale. Right from the get go, when we designed the multicore at MIT, we used the mesh network where the idea is to combine the processor core with a switch. You then have as many switches as you have processor cores, and together the switch and processor core is called a tile. Tiles are simply processed switches.

[To Be Continued]

[Part 4]
[Part 3]
[Part 2]
[Part 1]

This segment is part 5 in the series : The Next Big Innovation in Microprocessors: Anant Agarwal
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