SiP is a major discontinuity

Okay, so I should explain what is the big deal about System-in-Package (SiP) …

You must have noticed the trend in cellular handsets of packing in dramatically diverse functionality? Samsung’s latest model has a 5 Mega Pixel camera, and if this is any indication, consumers will further reap benefits of such integration trends in the coming years.

What makes this possible? For a miniscule gadget to pack in various kinds of RF modules, DSP blocks, memory modules, etc. – the technology being used is SiP. It is at the heart of electronics miniaturization, along with Chip Scale Packaging (CSP). The differentiating phenomenon in very fast turn-around, affordable hyper-integration is SiP.

And what’s even more attractive for the IDMs is the fact that the SiP design paradigm allows them to mix dies from different process nodes. They can mix three 130nm modules with one 65nm module, thereby amortizing the old processes.

Finally, SiP will put a further brake in the slowdown of Moore’s Law. Now that old processes can be mixed in with the new, IDMs should rethink their entire product strategies, and Foundries should do capacity planning assuming that not all parts of a chip will require the newest process.

By all measures, SiP is a major discontinuity in the semiconductor business. Those chip houses who will figure out the implications and take advantage of it, stand to win big.